1. Field of the Invention
The present invention relates to a capacitor device and a method of manufacturing the same and, more particularly, a capacitor device capable of being arranged on a circuit board on which high-speed electronic parts are packaged to stabilize a power supply voltage and also being applied as a decoupling capacitor to reduce a high-frequency noise, and a method of manufacturing the same.
2. Description of the Related Art
In the digital LSI including the microprocessor, reduction in the power supply voltage is being advanced in recent years by increasing a processing speed and reducing consumption of power. In such digital LSI, the power supply voltage of LSI is liable to become unstable whenever the power consumption of LSI is suddenly varied, and others. Also, in the high-speed digital LSI, it is required to prevent the malfunction of LSI caused by the high-frequency noise because the stable operation in the higher frequency (GHz) range is requested.
Therefore, for the purpose of stabilizing the power supply voltage and reducing the high-frequency noise, the decoupling capacitor is arranged between the power supply line of LSI and the ground line.
In the conventional circuit substrate having the decoupling capacitor, the capacitor is packaged in the near area on the circuit board, in which the LSI chip is packaged. In this case, because the lead wirings must be extended between the LSI chip and the capacitor, the relatively high inductance is present between these leads. As a result, the effect of suppressing the variation in the power supply voltage and reducing the high-frequency noise on the high-speed LSI is lessened even though the decoupling capacitor is provided.
Therefore, there was proposed the approach of reducing the inductance by arranging the decoupling capacitor just under the LSI chip to get the shortest wiring distance between the LSI chip and the capacitor. For example, in Patent Literature 1 (Patent Application Publication (KOKAI) Hei 4-211191) and Patent Literature 2 (Patent Application Publication (KOKAI) 2001-326305(U.S. Pat. No. 6,507,497 B2)), it is set forth that the wiring distance between the LSI chip and the capacitor is shortened by forming the build-in parallel-plate type capacitor on the circuit substrate and then mounting the LSI chip thereon to thereby reduce the inductance.
As the method of manufacturing the parallel-plate type capacitor in the related art, a variety of methods are employed. For instance, there is the method of employing the valve metal film (Ta film, Al film, or the like) that is subjected to the anodic oxidation as the dielectric film of the capacitor. FIGS. 1A to 1E and FIG. 2 are sectional views showing the method of forming the parallel-plate type capacitor based on the anodic oxidation process in the related art. As shown in FIG. 1A, first a first conductive film 102a serving as the lower electrode is formed on a substrate 100, and then a valve metal film 104a is formed on the first conductive film 102a. Then, as shown in FIG. 1B, a resist film 108 in which an opening portion 108a is provided in an area, to which the anodic oxidation of the valve metal film 104a is to be applied, is formed on the valve metal film 104a. 
Then, a dielectric film 105 is formed by applying the anodic oxidation to the portion, which is exposed from the opening portion 108a in resist film 108, of the valve metal film 104a and then the resist film 108 is removed. Then, as shown in FIG. 1C, a second conductive film 110a serving as the upper electrode is formed on the dielectric film 105.
Then, as shown in FIG. 1D, an upper electrode 110 is formed by patterning the second conductive film 110a. Then, the portion of the valve metal film 104a, which is not covered with the dielectric film 105, is etched away, whereby a structure in which the dielectric film 105 is formed on a valve metal film pattern 104 is obtained. Then, a lower electrode 102 having an extended portion 102x extended from the valve metal film pattern 104 to the outside is formed by patterning the first conductive film 102a. Thus, a capacitor C having such a structure that the valve metal film pattern 104 and the overlying dielectric film 105 are put between the lower electrode 102 and the upper electrode 110 is obtained.
Then, as shown in FIG. 1E, a metal electrode 112 having a height that is equal to an upper surface of the upper electrode 110 is formed on the extended portion 102x of the lower electrode 102. Then, an insulating film 114 in which opening portions 114a are provided on the upper electrode 110 and the metal electrode 112 is formed. Then, an upper electrode connecting portion 110x and a lower electrode connecting portion 112x are formed by applying the Ni/Au plating to the upper electrode 110 and the metal electrode 112 in the opening portions 114a in the insulating film 114 respectively. The above metal electrode 112 is provided to make respective heights of the upper electrode connecting portion 110x and the lower electrode connecting portion 112x substantially uniform. As a result, the electronic parts, and the like can be connected to the upper electrode connecting portion 110x and the lower electrode connecting portion 112x via the bumps with good reliability.
The conventional capacitor C has the structure that the upper electrode connecting portion 110x is provided directly on the upper electrode 110 but the lower electrode connecting portion 112x is connected to the lower electrode 102 via the metal electrode 112 and the extended portion 102x of the lower electrode 102. In this manner, in the conventional capacitor C, the equivalent series inductance (ESL) is increased since the lead wiring must be extended from the lower electrode 102 to the lower electrode connecting portion 112x because of its structure, and as a result the high-frequency characteristic of the capacitor C is disturbed.
Also, as shown in an equivalent circuit in FIG. 2, the conventional capacitor C using the dielectric film 105 formed by the anodic oxidation process (the electrolytic capacitor) exhibits the polarity such that the good electric insulation characteristic can be obtained whenever the lower electrode 102 side serves as the anode electrode, whereas the electric insulation characteristic cannot be obtained because of its rectifying action whenever conversely the upper electrode 110 side serves as the anode electrode. As a result, in the case where the voltage is applied opposite to the polarity of the capacitor C, in some case the large leakage current flows through the capacitor and in turn the dielectric film is broken down to cause the short circuit or the capacitor C is destroyed by the thermal stress caused by the current.
In Patent Literature 3 (U.S. Pat. No. 6,272,003 B1) and Non-Patent Literature 1 (1997 Electronic Component and Technology Conference p.724-729), the capacitor in which the nonpolar dielectric film formed by the sputter method, or the like is provided on the common floating gate and then two separated plate patterns are formed on the dielectric film is set forth, for the purpose of improving the high-frequency characteristic by reducing the inductance of the capacitor.